As is known in the art, the availability of large portions of bandwidth coupled with the maturity of complementary metal oxide semiconductor (CMOS) process technology presents an opportunity to address applications having relatively high bandwidth demands including, but not limited to, communication applications. There has thus been a trend toward developing high-throughput wireless communication systems which operate in the millimeter-wave (mm-wave) frequency range (e.g. in the range of about 60 GHz to about 90 GHz).
As is also known, such mm-wave applications place great technical challenges on the design of a transceiver, due to factors such as power amplifier (PA) efficiency and linearity, high wireless channel loss and multipath, increasing parasitic effects for passive components, limited amplifier gain etc. In the development of state-of-the-art cellular base stations, for example, there is a drive toward providing base stations which include radios provided as integrated circuits (or “chips”) which are compatible with multiple standards (so-called multi-standard radio chips). This further increases the need for high-precision, high-throughput and energy-efficient backend processing.
The desire to best leverage available portions of the frequency spectrum for these and other high-throughput applications, results in a need for power amplifiers (PAs) having high-efficiency and high-linearity operating characteristics. While these conflicting PA design requirements have been satisfied in the past at low system throughputs by designing smart digital back-ends, the multi-giga samples/second (GSamples/s) throughput required in state-of-the-art applications places a significant challenge on digital baseband system design to perform the necessary modulation and predistortion operations at negligible power overhead.
This need for high-throughput, energy-efficient digital baseband systems becomes particularly important for outphasing PAs designed to improve efficiency while at the same time satisfying high-linearity requirements needed for higher-order signal constellations. At low throughputs (e.g. throughputs in the range of about 10 MSamples/s to about 100 MSamples/s), outphasing PAs rely upon relatively complex digital signal processing to generate outphasing vectors and make it possible to use relatively simple, high-efficiency switching PAs on each amplifying signal path of the outphasing PA.
Examples of such outphasing PAs include so-called linear-amplification-by-nonlinear-component (LINC) PAs, and asymmetric-multilevel-outphasing (AMO) PAs. Outphasing PA systems include a signal component separator (SCS) which decomposes an original sample signal fed to an input thereof into two signals as required by the outphasing systems (e.g. LINC/AMO systems, for example). Such decomposition involves the computations of several nonlinear functions.
At relatively high throughputs (e.g. throughputs in the multi-GSamples/s range), however, a radical redesign of the signal component separator (SCS) digital signal processing implementations is needed to prevent degradation in net power efficiency due to significant increase of digital baseband power consumption.
Conventional LINC signal component separators (SCSs) have been implemented as both analog and digital circuits. The analog circuit versions of SCSs are not suitable for high-speed and high-precision applications leaving digital SCS implementations as a practical option for use in high throughput applications.
For digitally implemented SCS, a look-up-table (LUT) is the most common way to realize the nonlinear functions. Conventional signal separators operate primarily below the range of 100 MSamples/s with low to medium precision and thus, an LUT approach is a relatively simple and energy-efficient approach. Even for AMO architectures, an LUT approach is still a preferable choice for operations under 100 MSamples/s. However, a traditional LUT-based function map quickly becomes infeasible when the throughput and precision requirements rise to multi-GSamples/s and more than a 10-bit range. Indeed, LUT size becomes prohibitively large for on-chip implementations and thus the LUT approach falls to meet the needs of state-of-the-art systems both in terms of the amount of area required and speed characteristics.
Furthermore, the number of LUTs used in an AMO SCS is significantly larger than in a LINC SCS. Thus, LUT solutions that work for LINC systems render AMO implementations infeasible. And while a direct nonlinear function synthesis approach (e.g. via iterative algorithms such as a coordinate rotation digital computer (CORDIC) technique or nonlinear filters are possible and proves to be relatively area compact, at such high throughputs, these approaches suffer from a prohibitive power footprint for the overall power efficiency of the PA.